1. Field of the Invention
The present invention relates to a method and to a circuit arrangement for the conversion of a binary signal which alternates between first and second levels to a pulse code signal which comprises a data pulse having a first polarity when the binary signal changes from the first to the second level and a data pulse having a second polarity when the binary signal changes from the second to the first level, as well as renewal pulses between two data pulses having the polarity of the last-occurred data pulse, respectively.
2. Description of the Prior Art
A method of the type generally set forth above and a circuit arrangement for carrying out the method is known from the U.S. Pat. No. 4,027,152. A renewal pulse between two data pulses occurs when a specific, defined time interval has elapsed since a first-transmitted data pulse or renewal pulse without a further data pulse having been transmitted. The renewal pulses, in the case of this particular known method, are therefore chronologically-synchronized to a preceding data pulse. If, in the case of this method, or in the case of the circuit arrangement, the generation of a renewal pulse has already been initiated through a time element output signal, and if, at this time, a level change in the binary signal occurs, the result can be an undesired displacement of the leading edge of the data pulse which represents this level change, because the output signal of the time element which monitors the time interval which has elapsed since the transmission of a last-transmitted data pulse or renewal pulse, for the purpose of triggering a renewal pulse, upon activation of one of the two pulse generators employed therein, blocks the respective other pulse generator, and is precisely the latter which is to generate the new data pulse.